List of MoSys patents

Patents where

Current Assignee

Name

‌

MoSys

Name	Description	Patent Applicant	Current Assignee	Patent Jurisdiction	Patent Number	Date of Patent
‌ US Patent 9354823 Memory system including variable write burst and broadcast command scheduling	Patent 9354823 was granted and assigned to MoSys on May, 2016 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9354823	May 31, 2016
‌ US Patent 8635417 Memory system including variable write command scheduling	Patent 8635417 was granted and assigned to MoSys on January, 2014 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8635417	January 21, 2014
‌ US Patent 9037928 Memory device with background built-in self-testing and background built-in self-repair	Patent 9037928 was granted and assigned to MoSys on May, 2015 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	9037928	May 19, 2015
‌ US Patent 8161355 Automatic refresh for improving data retention and endurance characteristics of an embedded non-volatile memory in a standard CMOS logic process	Patent 8161355 was granted and assigned to MoSys on April, 2012 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8161355	April 17, 2012
‌ US Patent 8081521 Two bits per cell non-volatile memory architecture	Patent 8081521 was granted and assigned to MoSys on December, 2011 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8081521	December 20, 2011
‌ US Patent 9361196 Memory device with background built-in self-repair using background built-in self-testing	Patent 9361196 was granted and assigned to MoSys on June, 2016 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9361196	June 7, 2016
‌ US Patent 9667546 Programmable partitionable counter	Patent 9667546 was granted and assigned to MoSys on May, 2017 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9667546	May 30, 2017
‌ US Patent 9496009 Memory with bank-conflict-resolution (BCR) module including cache	Patent 9496009 was granted and assigned to MoSys on November, 2016 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9496009	November 15, 2016
‌ US Patent 8370725 Communication interface and protocol	Patent 8370725 was granted and assigned to MoSys on February, 2013 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8370725	February 5, 2013
‌ US Patent 9529569 Method and apparatus for randomizer	Patent 9529569 was granted and assigned to MoSys on December, 2016 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9529569	December 27, 2016
‌ US Patent 9553566 Hybrid driver circuit	Patent 9553566 was granted and assigned to MoSys on January, 2017 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9553566	January 24, 2017
‌ US Patent 8368217 Integrated circuit package with segregated Tx and Rx data channels	Patent 8368217 was granted and assigned to MoSys on February, 2013 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8368217	February 5, 2013
‌ US Patent 7919367 Method to increase charge retention of non-volatile memory manufactured in a single-gate logic process	Patent 7919367 was granted and assigned to MoSys on April, 2011 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	7919367	April 5, 2011
‌ US Patent 8988956 Programmable memory built in self repair circuit	Patent 8988956 was granted and assigned to MoSys on March, 2015 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	8988956	March 24, 2015
‌ US Patent 9054578 Hybrid driver including a turbo mode	Patent 9054578 was granted and assigned to MoSys on June, 2015 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9054578	June 9, 2015
‌ US Patent 9342471 High utilization multi-partitioned serial memory	Patent 9342471 was granted and assigned to MoSys on May, 2016 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	9342471	May 17, 2016
‌ US Patent 8681574 Separate pass gate controlled sense amplifier	Patent 8681574 was granted and assigned to MoSys on March, 2014 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8681574	March 25, 2014
‌ US Patent 8836381 Pseudo-supply hybrid driver	Patent 8836381 was granted and assigned to MoSys on September, 2014 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	8836381	September 16, 2014
‌ US Patent 7944281 Constant reference cell current generator for non-volatile memories	Patent 7944281 was granted and assigned to MoSys on May, 2011 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	7944281	May 17, 2011
‌ US Patent 8361863 Embedded DRAM with multiple gate oxide thicknesses	Patent 8361863 was granted and assigned to MoSys on January, 2013 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8361863	January 29, 2013
‌ US Patent 8473695 Memory system including variable write command scheduling	Patent 8473695 was granted and assigned to MoSys on June, 2013 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8473695	June 25, 2013
‌ US Patent 8954803 Programmable test engine (PCDTE) for emerging memory technologies	Patent 8954803 was granted and assigned to MoSys on February, 2015 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	8954803	February 10, 2015
‌ US Patent 9030894 Hierarchical multi-bank multi-port memory organization	Patent 9030894 was granted and assigned to MoSys on May, 2015 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9030894	May 12, 2015
‌ US Patent 9148154 Delay-locked loop with independent phase adjustment of delayed clock output pairs	Patent 9148154 was granted and assigned to MoSys on September, 2015 by the United States Patent and Trademark Office.	‌ MoSys	‌ MoSys	United States Patent and Trademark Office	9148154	September 29, 2015
‌ US Patent 7894270 Data restoration method for a non-volatile memory	Patent 7894270 was granted and assigned to MoSys on February, 2011 by the United States Patent and Trademark Office.		‌ MoSys	United States Patent and Trademark Office	7894270	February 22, 2011

Results per page:

49 results

0 selected

49 results

0 selected