US Patent 8223526 Low power antifuse sensing scheme with improved reliability

Generally, a method and circuit for improving the retention and reliability of unprogrammed anti-fuse memory cells. This is achieved by minimizing the tunneling current through the unprogrammed anti-fuse memory cells which can cause eventual gate oxide breakdown. The amount of time a read voltage is applied to the anti-fuse memory cells is reduced by pulsing a read voltage applied to a wordline connected to the unprogrammed anti-fuse memory cells, thereby reducing the tunneling current. Further tunneling current can be reduced by decoupling the unprogrammed anti-fuse memory cells from a sense amplifier that can drive the corresponding bitline to VSS.