Patent attributes
A gate driver-on-array structure integrated in a display panel includes a bar-like conductive layer, a semiconductor layer, first conductive patterns, second conductive patterns, a first electrode line and a second electrode line. The bar-like conductive layer has a plurality of regions. The semiconductor layer is disposed within the regions of the bar-like conductive layer. The first conductive patterns and the second conductive patterns are disposed on the semiconductor layer and located within the regions. The bar-like conductive layer is located between the first electrode line and the second electrode line. The first electrode line and the second electrode line are respectively spaced from the bar-like conductive layer by a first distance and a second distance. The GOA structure has first connectors connected to the corresponding first conductive patterns and the first electrode line, and second connectors connected to the second conductive patterns and the second electrode line.
