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US Patent 7689960 Programmable via modeling

Patent 7689960 was granted and assigned to EASIC on March, 2010 by the United States Patent and Trademark Office.

Overview Structured Data Issues Contributors

Is a

Patent

Patent attributes

Current Assignee

EASIC

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

76899600

Patent Inventor Names

Soon Chieh Lim0

Yit Ping Kok0

Yin Hao Liew0

Jonathan Park0

Wai Leng Chek0

Date of Patent

March 30, 2010

Patent Application Number

113388040

Date Filed

January 25, 2006

Patent Primary Examiner

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Naum B Levin

Patent abstract

A method for verifying library components and designs on a via customizable ASIC, which may include the process of adding capacitors to model possible via sites of a model of an un-customized portion of or a whole ASIC, and replacing the capacitors with resistors to model where custom vias have been placed on the ASIC to implement a desired component or design. Views of this model may then be generated to verify the functionality of the component or design, and component models for timing, function and via customization may then be generated for the component library.