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US Patent 10483184 Recursive metal embedded chip assembly

Patent 10483184 was granted and assigned to Hrl Laboratories, Llc on November, 2019 by the United States Patent and Trademark Office.

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Patent
Patent

Patent attributes

Patent Applicant
Hrl Laboratories, Llc
Hrl Laboratories, Llc
Current Assignee
Hrl Laboratories, Llc
Hrl Laboratories, Llc
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10483184
Patent Inventor Names
Florian G. Herrault0
Miroslav Micovic0
Date of Patent
November 19, 2019
Patent Application Number
15951875
Date Filed
April 12, 2018
Patent Citations Received
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US Patent 12125759 Chip integration into cavities of a host wafer using lateral dielectric material bonding
0
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US Patent 11756848 Chip integration into cavities of a host wafer using lateral dielectric material bonding
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US Patent 11917746 Low cost panel AESA with thermal management
0
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US Patent 11940495 Built in self-test of heterogeneous integrated radio frequency chiplets
0
Patent Primary Examiner
Patent abstract

A recursive metal-embedded chip assembly (R-MECA) process and method is described for heterogeneous integration of multiple die from diverse device technologies. The recursive aspect of this integration technology enables integration of increasingly-complex subsystems while bridging different scales for devices, interconnects and components. Additionally, the proposed concepts include high thermal management performance that is maintained through the multiple recursive levels of R-MECA, which is a key requirement for high-performance heterogeneous integration of digital, analog mixed signal and RF subsystems. At the wafer-scale, chips from diverse technologies and different thicknesses are initially embedded in a metal heat spreader surrounded by a mesh wafer host. An embodiment uses metal embedding on the backside of the chips as a key differentiator for high-density integration, and built-in thermal management. After die embedding, wafer-level front side interconnects are fabricated to interconnect the various chips and with each other. The wafer is then diced into individual metal-embedded chip assembly (MECA) modules, and forms the level one for multi-scale R-MECA integration. These modules are subsequently integrated into another wafer or board using the same integration approach recursively. Additional components such as discrete passive resistors, capacitors and inductors can be integrated at the second level, once the high-resolution, high-density integration has been performed at level zero. This recursive integration offers a practical solution to build very large scale integrated systems and subsystems.

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