SBIR/STTR Award attributes
Modern and near-future weapon systems, including hyper-sonics, require high performance image processors in space. To address this need Ibeos performed preliminary development of a radiation-tolerant software-based processing solution for machine-vision algorithms during the SBIR Phase I period of performance. Its combination of >1 TFLOPS throughput, 15 in3 volume, 35W maximum power, and harsh environment compatibility enable the real-time local processing. The work performed under this program leveraged Ibeos’ first generation EDGE space payload processor, which utilizes a commercial Nvidia TK1 as the primary processing engine. This proposal describes Ibeos’ efforts under an MDA Phase I SBIR to develop a next generation EDGE processing unit (EDGE-2), and its proposed work for a Phase II SBIR to continue this development. The goal of Phase I was to develop an early architecture for a space processor that could host machine vision computer algorithms. Specifically, for the Phase I program, Ibeos focused on: early requirements development; selection of primary processor for the EDGE-2; initial radiation testing of selected processor at the National Synchrotron Radiation Laboratory; Initial radiation analysis of selected processor; early architecture design of space processor board with radiation mitigation hardware and software. For the Phase II program, Ibeos will complete an EDGE-2 prototype hardware design. This prototype will be used for full radiation performance characterization. In addition, a unit will be delivered to the government customer to allow for benchtop testing against government furnished sample imagery and processing algorithms. Other payload computer performance will be assessed and the results compared to quantify the performance benefits of the Ibeos solution. A test plan will be delivered with the hardware, and will include the figures of merit to assess overall performance. An additional Phase II objective is to obtain early flight heritage of the processor. Currently, an early flight opportunity may exist with the DARPA customer. Ibeos has been in contact with program managers in DARPA’s Tactical Technology Office (TTO) over the past few years given the organization’s interest in on-board edge processing for satellites. If an early flight opportunity for the EDGE-2 exists through a DARPA cubesat program, Ibeos is prepared to support. By the end of the Phase II program, Ibeos will have completed full design of a prototype payload processor, and its performance will have been validated using government furnished data. The EDGE-2 will have reached a Technology Readiness Level (TRL) 6, with key components verified to a TRL 8 (including full radiation characterization of all key components). These results will serve as an important base for a Phase III program. At this time, a majority of the design work for a full flight unit will be complete. By the end of Phase II, the EDGE-2 will be ready to bring to market. Approved for Public Release | 20-MDA-10643 (3 Dec 20)
