List of Adesto Technologies patents

Patents where

Current Assignee

Name

Adesto Technologies

Name	Description	Patent Applicant	Current Assignee	Patent Jurisdiction	Patent Number	Date of Patent
‌ US Patent 9922684 Memory device ultra-deep power-down mode exit control	Patent 9922684 was granted and assigned to Adesto Technologies on March, 2018 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	9922684	March 20, 2018
‌ US Patent 10042587 Automatic resumption of suspended write operation upon completion of higher priority write operation in a memory device	Patent 10042587 was granted and assigned to Adesto Technologies on August, 2018 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10042587	August 7, 2018
‌ US Patent 9812200 Concurrent read and write operations in a serial flash device	Patent 9812200 was granted and assigned to Adesto Technologies on November, 2017 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	9812200	November 7, 2017
‌ US Patent 10140062 Automatic resumption of suspended write operation upon completion of higher priority write operation in a memory device	Patent 10140062 was granted and assigned to Adesto Technologies on November, 2018 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10140062	November 27, 2018
‌ US Patent 11366774 Memory latency reduction in XIP mode		Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	11366774	June 21, 2022
‌ US Patent 11056155 Nonvolatile memory devices, systems and methods with switching charge pump architectures	Patent 11056155 was granted and assigned to Adesto Technologies on July, 2021 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	11056155	July 6, 2021
‌ US Patent 10539989 Memory device alert of completion of internally self-timed power-up and reset operations	Patent 10539989 was granted and assigned to Adesto Technologies on January, 2020 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10539989	January 21, 2020
‌ US Patent 11537754 Pseudo physically unclonable functions (PUFS) using one or more addressable arrays of elements having random/pseudo-random values	Patent 11537754 was granted and assigned to Adesto Technologies on December, 2022 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	11537754	December 27, 2022
‌ US Patent 11392516 Memory devices and methods having instruction acknowledgement	Patent 11392516 was granted and assigned to Adesto Technologies on July, 2022 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	11392516	July 19, 2022
‌ US Patent 11056646 Memory device having programmable impedance elements with a common conductor formed below bit lines	Patent 11056646 was granted and assigned to Adesto Technologies on July, 2021 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	11056646	July 6, 2021
‌ US Patent 10984861 Reference circuits and methods for resistive memories	Patent 10984861 was granted and assigned to Adesto Technologies on April, 2021 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10984861	April 20, 2021
‌ US Patent 10636480 Concurrent read and reconfigured write operations in a memory device	Patent 10636480 was granted and assigned to Adesto Technologies on April, 2020 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10636480	April 28, 2020
‌ US Patent 10409505 Ultra-deep power down mode control in a memory device	Patent 10409505 was granted and assigned to Adesto Technologies on September, 2019 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10409505	September 10, 2019
‌ US Patent 9812183 Read latency reduction in a memory device	Patent 9812183 was granted and assigned to Adesto Technologies on November, 2017 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	9812183	November 7, 2017
‌ US Patent 11094375 Concurrent read and reconfigured write operations in a memory device	Patent 11094375 was granted and assigned to Adesto Technologies on August, 2021 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	11094375	August 17, 2021
‌ US Patent 9711719 Nonvolatile memory elements having conductive structures with semimetals and/or semiconductors	Patent 9711719 was granted and assigned to Adesto Technologies on July, 2017 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	9711719	July 18, 2017
‌ US Patent 9455036 System architectures with data transfer paths between different memory types	Patent 9455036 was granted and assigned to Adesto Technologies on September, 2016 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	9455036	September 27, 2016
‌ US Patent 10275372 Cached memory structure and operation	Patent 10275372 was granted and assigned to Adesto Technologies on April, 2019 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10275372	April 30, 2019
‌ US Patent 10290334 Read latency reduction in a memory device	Patent 10290334 was granted and assigned to Adesto Technologies on May, 2019 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10290334	May 14, 2019
‌ US Patent 9472272 Resistive switching memory with cell access by analog signal controlled transmission gate	Patent 9472272 was granted and assigned to Adesto Technologies on October, 2016 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	9472272	October 18, 2016
‌ US Patent 9570166 Read operations and circuits for memory devices having programmable elements, including programmable resistance elements	Patent 9570166 was granted and assigned to Adesto Technologies on February, 2017 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	9570166	February 14, 2017
‌ US Patent 10726888 Read latency reduction in a memory device		Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10726888	July 28, 2020
‌ US Patent 10031869 Cached memory structure and operation	Patent 10031869 was granted and assigned to Adesto Technologies on July, 2018 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	10031869	July 24, 2018
‌ US Patent 10777268 Static random access memories with programmable impedance elements and methods and devices including the same	Patent 10777268 was granted and assigned to Adesto Technologies on September, 2020 by the United States Patent and Trademark Office.	Adesto Technologies	Adesto Technologies	United States Patent and Trademark Office	10777268	September 15, 2020
‌ US Patent 9852090 Serial memory device alert of an external host to completion of an internally self-timed operation	Patent 9852090 was granted and assigned to Adesto Technologies on December, 2017 by the United States Patent and Trademark Office.		Adesto Technologies	United States Patent and Trademark Office	9852090	December 26, 2017

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