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US Patent 9842651 Three-dimensional vertical NOR flash thin film transistor strings

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
November 4, 2016
Date of Patent
December 12, 2017
Patent Application Number
15343332
Patent Citations Received
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US Patent 12105650 Quasi-volatile system-level memory
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US Patent 12068286 Device with embedded high-bandwidth, high-capacity memory using wafer bonding
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US Patent 12073082 High capacity memory circuit with low effective latency
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US Patent 11705496 Charge-trapping layer with optimized number of charge-trapping sites for fast program and erase of a memory cell in a 3-dimensional NOR memory string array
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US Patent 11711928 3D memory devices and structures with control circuits
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US Patent 11710729 Wafer bonding in fabrication of 3-dimensional NOR memory circuits
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US Patent 11749344 Three-dimensional vertical nor flash thin-film transistor strings
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US Patent 11751388 3-dimensional nor strings with segmented shared source regions
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US Patent 11751391 Methods for fabricating a 3-dimensional memory structure of nor memory strings
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US Patent 11751392 Fabrication method for a 3-dimensional NOR memory array
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
9842651
Patent Primary Examiner
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Harry W Byrne

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