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US Patent 9171929 Strained structure of semiconductor device and method of making the strained structure

Patent 9171929 was granted and assigned to Taiwan Semiconductor Manufacturing Company on October, 2015 by the United States Patent and Trademark Office.

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Patent attributes

Current Assignee
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
91719290
Date of Patent
October 27, 2015
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Patent Application Number
134878600
Date Filed
June 4, 2012
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Patent Citations Received
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US Patent 12136600 Grounded metal ring structure for through-silicon via
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US Patent 12132050 Semiconductor structure cutting process and structures formed thereby
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US Patent 12132091 Work function layers for transistor gate electrodes
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US Patent 12132100 Profile control in forming epitaxy regions for transistors
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US Patent 11670590 Chip structure with etch stop layer and method for forming the same
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US Patent 11670586 Semiconductor device with source resistor and manufacturing method thereof
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US Patent 11670694 Dual metal capped via contact structures for semiconductor devices
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US Patent 11677013 Source/drain epitaxial layers for transistors
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...
Patent Primary Examiner
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Chuong A Luu
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Patent abstract

An exemplary structure for a field effect transistor (FET) comprises a silicon substrate comprising a first surface; a channel portion over the first surface, wherein the channel portion has a second surface at a first height above the first surface, and a length parallel to first surface; and two source/drain (S/D) regions on the first surface and surrounding the channel portion along the length of the channel portion, wherein the two S/D regions comprise SiGe, Ge, Si, SiC, GeSn, SiGeSn, SiSn, or III-V material.

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