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US Patent 12125848 Semiconductor device structure incorporating air gap

Patent 12125848 was granted and assigned to Taiwan Semiconductor Manufacturing Company on October, 2024 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
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Patent attributes

Patent Applicant
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Current Assignee
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
121258480
Patent Inventor Names
Wen-Yuan Chen0
Chung-Wei Wu0
Jon-Hsu Ho0
Wen-Hsing Hsieh0
Kuan-Lun Cheng0
Zhi-Qiang Wu0
Chun-Chung Su0
Chih-Ching Wang0
Date of Patent
October 22, 2024
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Patent Application Number
181329240
Date Filed
April 10, 2023
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Patent Citations
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US Patent 9502265 Vertical gate all around (VGAA) transistors and methods of forming the same
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US Patent 9520482 Method of cutting metal gate
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US Patent 9536738 Vertical gate all around (VGAA) devices and methods of manufacturing the same
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US Patent 9608116 FINFETs with wrap-around silicide and method forming the same
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US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
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US Patent 9209247 Self-aligned wrapped-around structure
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US Patent 9236267 Cut-mask patterning process for fin-like field effect transistor (FinFET) device
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US Patent 9412817 Silicide regions in vertical gate all around (VGAA) devices and methods of forming same
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...
Patent Primary Examiner
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Sonya McCall-Shepard
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CPC Code
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H01L 21/823814
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H01L 29/41783
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H01L 21/823418
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H01L 29/7845
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H01L 29/806
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H01L 29/7839
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H01L 21/823481
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H01L 21/764
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Patent abstract

A semiconductor device structure includes a dielectric layer, a first source/drain feature in contact with the dielectric layer, wherein the first source/drain feature comprises a first sidewall. The structure also includes a second source/drain feature in contact with the dielectric layer and adjacent to the first source/drain feature, wherein the second source/drain feature comprises a second sidewall. The structure also includes an insulating layer disposed over the dielectric layer and between the first sidewall and the second sidewall, wherein the insulating layer comprises a first surface facing the first sidewall, a second surface facing the second sidewall, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface. The structure further includes a sealing material disposed between the first sidewall and the first surface, wherein the sealing material, the first sidewall, the first surface, and the dielectric layer are exposed to an air gap.

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