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US Patent 11676867 Method for manufacturing semiconductor structure

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Patent
Patent
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Patent attributes

Patent Applicant
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Current Assignee
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
116768670
Date of Patent
June 13, 2023
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Patent Application Number
173976380
Date Filed
August 9, 2021
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Patent Citations
‌
US Patent 11133222 Method for manufacturing semiconductor structure
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US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
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US Patent 8796666 MOS devices with strain buffer layer and methods of forming the same
0
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US Patent 8963258 FinFET with bottom SiGe layer in source/drain
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US Patent 9093530 Fin structure of FinFET
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US Patent 9171929 Strained structure of semiconductor device and method of making the strained structure
0
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US Patent 9548303 FinFET devices with unique fin shape and the fabrication thereof
0
Patent Primary Examiner
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Ratisha Mehta
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Methods of manufacturing a semiconductor structure are provided. One of the methods includes the following operations. A substrate is received, and the substrate includes a first conductive region and a second conductive region. A first laser anneal is performed on the first conductive region to repair lattice damage. An amorphization is performed on the first conductive region and the second conductive region to enhance silicide formation to a desired phase transformation in the subsequent operations. A pre-silicide layer is formed on the substrate. A thermal anneal is performed to the substrate to form a silicide layer from the pre-silicide layer. A second laser anneal is performed on the first conductive region and the second conductive region.

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