Log in
Enquire now
‌

US Patent 10418272 Methods, apparatus, and system for a semiconductor device comprising gates with short heights

OverviewStructured DataIssuesContributors

Contents

Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10418272
Date of Patent
September 17, 2019
Patent Application Number
15976326
Date Filed
May 10, 2018
Patent Citations Received
‌
US Patent 12080779 Capping layer for gate electrodes
0
‌
US Patent 11854803 Gate spacer patterning
0
Patent Primary Examiner
‌
Chuong A Luu
Patent abstract

At least one method, apparatus and system providing semiconductor devices with relatively short gate heights but without a relatively high risk of contact-to-gate shorts. In embodiments, the method, apparatus, and system may provide contact formation by way of self-aligned contact processes.

Timeline

No Timeline data yet.

Further Resources

Title
Author
Link
Type
Date
No Further Resources data yet.

References

Find more entities like US Patent 10418272 Methods, apparatus, and system for a semiconductor device comprising gates with short heights

Use the Golden Query Tool to find similar entities by any field in the Knowledge Graph, including industry, location, and more.
Open Query Tool
Access by API
Golden Query Tool
Golden logo

Company

  • Home
  • Press & Media
  • Blog
  • Careers
  • WE'RE HIRING

Products

  • Knowledge Graph
  • Query Tool
  • Data Requests
  • Knowledge Storage
  • API
  • Pricing
  • Enterprise
  • ChatGPT Plugin

Legal

  • Terms of Service
  • Enterprise Terms of Service
  • Privacy Policy

Help

  • Help center
  • API Documentation
  • Contact Us
By using this site, you agree to our Terms of Service.