Patent attributes
A lane departure detection computing device for a lane departure detection system is described. The computing device includes one or more processors for controlling operation of the computing device, and a memory for storing data and program instructions usable by the one or more processors. The one or more processors are configured to execute instructions stored in the memory to calculate a first path geometry relating to a first vehicle traveling in a first lane, calculate a second path geometry relating to a second vehicle traveling in a second lane different from the first lane, evaluate coextensive portions of the first path and the second path for parallelism, and, if the coextensive portions of the first path and the second path evaluated for parallelism are not parallel, determine that one of the first vehicle and the second vehicle is executing a lane departure.